Three seventh-gen and handheld flagships join the fleet: PlayStation Vita (#63, 2011) — ARM Cortex-A9 quad-core + SGX543MP4 GPU + 960×544 OLED; PlayStation 3 (#64, 2006) — Cell Broadband Engine PPE (PPC G5-class) + RSX GPU + 1280×720 HD; Wii U (#65, 2012) — IBM Espresso tri-core PPC + AMD GPU7 + 1280×720. The PS3 is the first Cell architecture in the fleet and a full PPC G5 cousin. The Wii U closes the PPC console trilogy: GameCube (Gekko) → Wii (Broadway) → Wii U (Espresso). 65 LAUNCHABLE systems. (sigil-retropie 2d3cd89, 211905c, 64ce727)
PlayStation Vita — system #63
Commit 2d3cd89. Core: cores/vita.sg. uart=63 PASS. apps/vita (EL0), loads /roms/game.vpk.
- CPU: ARM Cortex-A9 quad-core (ARMv7-A, 4 cores, 444MHz). The Vita's A9 is the same core family as the Raspberry Pi 2 — the most capable ARM in the fleet so far. Each core has a 32KB L1 I/D cache; a 512KB L2 cache is shared across all four cores. VFPv3 + NEON SIMD for floating-point and vector operations.
- GPU: PowerVR SGX543MP4 — 4 GPU cores of the SGX543. The same SGX series powers the iPad 2 and iPhone 4S. Tile-based deferred rendering: the GPU bins geometry by screen tile before shading, dramatically reducing bandwidth to main memory.
- Screen: 960×544 OLED — the first OLED in the fleet. 16:9 aspect ratio, approximately 220ppi.
vita_rendercopies the framebuffer to the OLED panel. OLED panels have per-pixel light emission, so black pixels consume no power. - Memory: 512MB LPDDR2 system RAM + 128MB dedicated VRAM for the SGX543MP4.
PlayStation 3 — system #64
Commit 211905c. Core: cores/ps3.sg. uart=64 PASS. apps/ps3 (EL0), loads /roms/game.pkg.
- CPU: Cell Broadband Engine — PPE (Power Processing Element) stub. In real hardware, the full Cell has 1 PPE + 8 SPEs (Synergistic Processing Elements); the Sigil stub models the PPE only — a full 64-bit PPC G5-derived core at 3.2GHz. The PPE is a dual-threaded in-order core running the PowerPC 2.02 ISA; it issues work to the SPEs via DMA and mailbox.
- GPU: Nvidia RSX "Reality Synthesizer" — NV47-derived (GeForce 7800 class), OpenGL 2.0, 256MB GDDR3 VRAM. Renders to the 720p framebuffer via the Reality Synthesizer's output stage. The RSX is connected to the PPE over a proprietary Flex I/O bus, not PCI-E.
- Resolution: 1280×720 (720p HD).
ps3_rendercopies to the display framebuffer. - Memory: 256MB XDR DRAM (PPE-side) + 256MB GDDR3 (RSX-side). The two memory pools are separate — the PPE cannot directly address RSX VRAM and vice versa; DMA is required.
- PPC note: The Cell PPE is the closest thing to a modern (2006-era) PPC G5 in the fleet. The same HAL seams used for the Power Mac G5 —
ppc_htab,ppc_dart,ppc_firewire,ppc_spr— apply to the PPE's architectural primitives. The PS3 reuses the G5 HAL layer directly.
Wii U — system #65
Commit 64ce727. Core: cores/wiiu.sg. uart=65 PASS. apps/wiiu (EL0), loads /roms/game.wux.
- CPU: IBM "Espresso" tri-core PPC — 3 cores derived from the Broadway G3, enhanced with out-of-order execution and 3MB L2 cache per cluster. 1.24GHz. Backward compatible with Wii software via the same Broadway ISA. AltiVec-capable (the same VMX SIMD unit as the G4 and G5).
- GPU: AMD "GPU7" (Latte) — AMD R700-family, unified shader architecture. 32MB on-die eDRAM for frame resolve (the same technique as the Xbox 360's EDRAM tile buffer). Renders the 720p GamePad stream in addition to the main TV output — two independent display targets from one GPU.
- Resolution: 1280×720 (TV output) + secondary 854×480 GamePad stream.
wiiu_renderoutputs the primary TV framebuffer. - Memory: 2GB LPDDR3 (DDR3 at 1600MHz) — by far the largest DRAM in the fleet. The Wii U's memory advantage over the PS3 and Xbox 360 was significant for OS/system use, though game-available RAM was smaller after the OS reserved its share.
- PPC console trilogy closed: GameCube (Gekko IBM 750CXe, 485MHz, 2001) → Wii (Broadway IBM 750CL, 729MHz, 2006) → Wii U (Espresso IBM 750-derived, 1.24GHz, 2012). Three generations of PPC consoles, all sharing the same HAL seam database:
ppc_bat,ppc_htab,ppc_tlb,ppc_altivec.
Fleet overview — 65 LAUNCHABLE systems
With Wii U at system #65, the fleet spans 6 CPU architectures across four decades of consumer hardware. Every system boots under one capability-secure kernel.
| Architecture | Count | Systems (examples) |
|---|---|---|
| ARM (various) | 16 | Game Boy Advance, NDS, 3DS, PS Vita |
| PowerPC | 8 | GameCube, Wii, Wii U, Xbox 360, PS3 |
| MIPS | 5 | PSP, PS2, N64 |
| Motorola 68k | 7 | Genesis, SNES-DSP, Jaguar |
| x86 / x86-64 | 2 | (future) |
| Other / Unique | 27 | Atari, NES, SNES, Saturn, etc. |
65 systems. 6 architectures. One capability-secure kernel. The PowerPC count of 8 now spans three console generations (GameCube/Wii/Wii U), the Cell architecture (PS3), the Xbox 360 (Xenon tri-core PPC), and the Power Mac G3/G4/G5 desktop seams — all sharing the same ppc_* HAL layer.